Notes from meeting 13-Dec-2002

											GMO
										      13-12-02

 Present: Bob Dobinson, Sergei Kolos, David Francis, Benedetto Gorini, Fred Wickens


 - Goal of the meeting:

	- Build upon what previously agreed in the wg to

		a) arrive at more details of what steps should be undertaken to provide the
		   information necessary to select a baseline architecture for the TDR by March 2003.

		b) agree on an agenda for the open meeting on tuesday 17/12 at 16:00


 - Background

	in the previous wg meetings it had been agreed that:
		a) there are two basic scenarios, loosely called "flat" and "sliced".
		b) flat and slice should be properly referred to the read/out. That is in
		   the flat scenario the ATLAS event is bufferd on ALL the ROBs, whereas the
		   sliced scenario makes an ATLAS event to be buffered on a sub-set of the ROBS
		   (actually #ROBs/N, where N is the number of slice). This latter entails that
	            up to N conccurrent and independent DAQ/HLT systems may be implemented, each
		   sustaining 1/N of the maximum LVL1 rate with larger (by factor N) ROS fragments.
		c) The main steps needed to provide the information to arrive at a decision are:

			i) definition of "candidate" layouts, based on the two scenarios and the
			   proposals put forward by the community
			ii)Costing of the layouts.
		       iii)Addressing of those technical points which are relevant to the selection. In
			   particular those technical issues which are not covered by existing workplans
			   should be detailed.


 - Benedetto presented for discussion the work he has done to define the "candidate" layouts. They were
   basically agreed (i.e. it is recognised that they are complete and they faithfully represent the proposals
   put forward by people in the community) with the suggestion to:

		a) Use the term ROL instead of S-Link,
		b) while still indicating who has specifically proposed s-link, and
		c) indicating that ROL may be implemented in other ways such as GE and Myrinet.
		d) Use buffer instead of ROB, to make the distinction between a physical component
		   (e.g. the ROBin) and buffers which are internal to the component (and could be
		   the destinations of separate ROLs in input to the ROBin).

 - What proposal can be applied to what scenario? It was felt that:

		a) the proposal from Bob Blair apllies to the flat scenario only.
		b) the proposals from Andreas and Lorne may be applied to the sliced scenario
		   if they imply (as it seems) that a custom switch is proposed.
		c) The proposals from Jos and Brian are applicable to both scenarios.

   It was hunanimously agreed that we should reccomend that custom hardware should not be built unless it is
   demonstrated that it is necessary.


 - Technical points:

	1) Studies (which do not need work and measurements on test benches) for the sliced option:

		- partitioning
		- ROI mechanism, synchronisation between ROD routing and L2
		- event type assignement to sub-farms
		- load balancing between slices

	2) results of the measurements for the bus-based vs switch based ros

	3) EB and LVL2 network studies

	4) ROD/ROB switch studies (needing measurements on test benches) based on commercial technology (and may
	  be also taking stock of the experience by CMS):

		- ROL BW requirements
		- test benches for studying issues around flow control
		- test benches to study issues around multiple ROD frg per L1A per ROBin

	- It was agreed that the bullets under 1) and 4) above will represent independent tasks and the TDMT
	  will be asked to organise teams to work them out.

 - Meeting on tuesday

	Giuseppe and BEnedetto will put together a backgorund document expanding on the above points and 
	including the "layout" drwaings by monday and distribute it to the community "well" (so to speak)
	ahead of the meeting

	The agenda of the meeting will mainly include:

		- a summary of the points above

		- a longer presentation by Benedetto on the diagrams

		- discussion with the goal of convercing on a concrete set of steps.